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Cross Section of TSVs, source: P. Leduc, LETI, D43D, 2010 Ready for primetime in ASICs…almost Thru-silicon-vias (TSVs) have become a very hot topic in in recent months. Ever since Xilinx reported that they are using a 2.5D TSV approach for their Virtex-7 FPGAs (http://bit.ly/ayfOgy), the industry started to salivate with the prospects of this new technology. While this [...] In the epic battle of cost and performance, MCM’s (multi-chip modules) had generally lost to SoC’s (system on chips) due to higher package assembly costs and lower performance. The tides are turning. Several factors have been in play in recently: Package assembly costs of MCM’s have been dropping in recent years Cross Sectional Drawing of TSV TSV’s (through-silicon-vias) are vias through a silicon die that allow for connections to pass to and from the active side of the die to the backside. These have the potential to really change the 3D playing field for SiP (system in package) applications but are really limited at the moment to [...] |
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